Hardware Setup

Required Hardware

RFSOM Module

The 802.11 FPGA Design targets the ADI ADRV9361 module. This board integrates the Zynq 7Z035 processor, AD9361 radio, and various peripherals. This module requires a carrier board.

ADI makes a second RFSOM module (ADI ADRV9364) with a smaller Zynq device and single-antenna radio transceiver (AD9364). The current 802.11 FPGA Design does not support the ADRV9364 module.

RFSOM Carrier

The 802.11 FPGA Design targets the RFSOM FMC carrier board (ADI ADRV1CRR-FMC). The RFSOM module mounts on this carrier board. The carrier provides various peripheral interfaces and an FMC slot.

The ETHERNET1 interface is used as the bridged interface for Ethernet Rx processing. The ETHERNET2 interface is used for wlan_exp command processing.

ADI makes a smaller Breakout RFSOM carrier (ADI ADRV1CRR-BOB). The current 802.11 FPGA Design does not support the Breakout Carrier.

Hardware Configuration

The 802.11 design requires specific configuration of the RFSOM hardware.

Boot Mode

The RFSOM module uses 3 switches to configure the Zynq boot mode. The RFSOM boot mode switches are labeled S1, S3 and S4. The figure below illustrates the switch locations. Each switch has a white dot indicating the “Off” position.

RFSOM Boot Mode Switches

Fig. 2.1 RFSOM boot mode switch locations

The table below gives the switch settings for each boot mode. This user guide assumes the Zynq is configured for FMC Carrier SD Boot.

Boot Mode S1 S3 S4
Cascade JTAG 0 0 x
QSPI 1 0 x
MicroSD Card (SOM) 1 1 0
SD Card (FMC carrier) 1 1 1

The Zynq device can be configured via JTAG in any boot mode. We recommend leaving S1/S3/S4 set to 1 (selecting FMC carrier SD boot).

FMC Module Configuration

The 802.11 FPGA design supports the Xilinx XM105 FMC module by default (see below). The XM105 module is not required. Using the FPGA design with other FMC modules requires modifying the FPGA design.

When using the XM105 a 2-pin shunt must be connected between the TDI and TDO pins. This shunt completes the JTAG chain when the module is mounted on the RFSOM FMC carrier. When using other FMC modules refer to the module documentation for how to use JTAG.

The RFSOM FMC carrier has a 3-pin jumper which sets the voltage of the VADJ rail. This jumper must be set properly before mounting an FMC module. When using the Xilinx XM105 debug module (see below) VADJ can be set to any voltage. When using other FMC modules, refer to the module documentation for its VADJ setting.

Additional Resources

Analog Devices maintains documentation for the RFSOM platform on their wiki. The ADI wiki also contains documentation for the ADI cores and code for the AD9361 transceiver interface.

The Analog Devices RFSOM platform was previously known as PicoZed SDR. The PicoZed SDR hardware was developed jointly by ADI and Avnet. ADI re-branded the platform when the ADI/Avnet relationship ended in 2017.

The original Avnet PicoZed SDR documentation is still available and remains a useful resource for using the RFSOM hardware.

Required Accessories

JTAG Cable

The Vivado SDK and debug tools require a JTAG connection between the PC and FPGA board. Any JTAG cable supported by Vivado will work with the 802.11 design. We recommend the Digilent JTAG-HS3 cable. The JTAG cable must be connected to the 14-pin JTAG header on the RFSOM FMC carrier (labeled P15 JTAG).

RF Accessories

The RFSOM uses U.FL jacks for its RF connections and includes U.FL - SMA plug adapter cables. You must supply the additional RF accessories required for your application. For example to test multiple nodes over a wired connection, you will need RF cables with SMA jacks, attenuators, splitters/combiners, etc. None of the antennas included with the RFSOM hardware cover the 2.4GHz band.