4.3. MAC IP Core

The MAC IP core implements real-time blocks to support MAC implementations and manages real-time interaction with the Tx/Rx PHY cores. The MAC IP core is implemented in Xilinx System Generator.

Fig. 4.1 MAC IP Core connections

The MAC IP Core is the primary interface between the MAC Software running in CPU Low and the Tx/Rx PHY cores. The MAC software monitors medium and PHY activity via registers in the MAC IP Core. The MAC software makes all decisions about when and what to transmit, then uses the logic in the MAC IP Core to realize precise timing for transmissions relative to other medium activity.

The MAC IP Core provides:

• Fully-programmable MAC logic
• Software defines full MAC protocol
• Logic implements real-time states
• Medium idle/busy monitoring
• IFS timers
• Parallel Tx controllers for independent Data, Beacon and Control packet Tx

The pages below provide more details on the timers and Tx controllers in the MAC IP Core:

• Rx Processing
• Timers
• Transmit Controllers
• MAC Core Register Map
• MAC Core Interface